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제108회 대한화학회 학술발표회, 총회 및 기기전시회 안내 Controlled Growth of Vertically Aligned Si Nanowire Arrays via Different Cooling Rate

2011년 8월 1일 15시 38분 51초
Ⅳ-INOR.P-90 이곳을 클릭하시면 발표코드에 대한 설명을 보실 수 있습니다.
금 <발표Ⅳ>
저자 및
정다희, 박이슬, 이진석
숙명여자대학교 화학과, Korea
Silicon, currently an essential and fundamental material in microelectronic technology, is pushed with the acceleration of photonics. Versatile electronic devices based on silicon nanowires as an attractive nanoscale block have been increasingly developed to strongly support future nanoelectronic applications. In particular, uniform, vertically aligned silicon nanowire (SiNW) arrays are promising building blocks for a range of vertical devices, such as surround-gate field-effect transistors, solar cells, and thermoelectric modules. In addition, vertical nanowires geometry also promises enhanced transistor performance due to the enhanced gate control efficiency in its surround-gate design and is a promising field emitter, owing to its large shape anisotropy, and great thermal/chemical stability under oxygen environments. However, if the end of NWs is condensed with residual Si source, they cannot work as a promising material for electronic devices or field emitter since it interrupts electrons to emit effectively. In this research, we demonstrate that synthesis of vertically aligned Si NWs having non condensed top with Si chunk. Additionally, we propose advanced CVD method to control cooling speed and residual gas after reaction. As a means to avoid Si chunk at the top of nanowires, we removed remaining Si source as soon as the reaction was completed and varied cooling speed. Besides, we varied several experimental parameters after reaction in order to check how residual gas has an effect on synthesis of Si NWs. Using this technique, highly ordered Si NWs without any Si sediment were expected to be fabricated.